Digital Design: With an Introduction to the Verilog HDL, VHDL, and SystemVerilog, 6th edition

  • M Morris R. Mano, 
  • Michael D. Ciletti

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Digital Design teaches the fundamental concepts of digital design in a clear, accessible manner. The text presents the basic tools for the design of digital circuits and provides procedures in all 3 public domain languages -- Verilog, VHDL, and SystemVerilog -- suitable for a variety of digital applications.

Published by Pearson (July 14th 2021) - Copyright © 2018

ISBN-13: 9780137501984

Subject: Electrical & Computer Engineering

Category: Computer Engineering

Table of contents


1. Digital Systems and Binary Numbers
Digital Systems
Binary Numbers
Number Base Conversions
Octal and Hexadecimal Numbers
Complements of Numbers
Signed Binary Numbers
Binary Codes
Binary Storage and Registers
Binary Logic

2. Boolean Algebra and Logic Gates
Basic Definitions
Axiomatic Definition of Boolean Algebra
Basic Theorems and Properties of Boolean Algebra
Boolean Functions
Canonical and Standard Forms
Other Logic Operations
Digital Logic Gates
Integrated Circuits

3. Gate Level Minimization
The Map Method
Four Variable K-Map
Product of Sums Simplification
Don’t Care Conditions
NAND and NOR Implementation
Other TwoLevel Implementations
Exclusive OR Function
Hardware Description Languages (HDLs)

4. Combinational Logic
Combinational Circuits
Analysis of Combinational Circuits
Design Procedure
Binary Adder - Subtractor
Decimal Adder
Binary Multiplier
Magnitude Comparator
HDL Models of Combinational Circuits

5. Synchronous Sequential Logic
Sequential Circuits
Storage Elements: Latches
Storage Elements: FlipFlops
Analysis of Clocked Sequential Circuits
Synthesizable HDL Models of Sequential Circuits
State Reduction and Assignment
Design Procedure

6. Registers and Counters
Shift Registers
Ripple Counters
Synchronous Counters
Other Counters
HDL Models of Registers and Counters

7. Memory and Programmable Logic
RandomAccess Memory
Memory Decoding
Error Detection and Correction
ReadOnly Memory
Programmable Logic Array
Programmable Array Logic
Sequential Programmable Devices

8. Design at the Register Transfer Level
Register Transfer Level (RTL) Notation
RTL descriptions VERILOG (Edge- and Level-Sensitive Behaviors)
Algorithmic State Machines (ASMs)
Design Example (ASMD Chart)
HDL Description of Design Example
Sequential Binary Multiplier
Control Logic
HDL Description of Binary Multiplier
Design with Multiplexers
RaceFree Design (Software Race Conditions)
LatchFree Design (Why Waste Silicon?)
System Verilog -- An Introduction

9. Laboratory Experiments with Standard ICs and FPGAs
Introduction to Experiments
Experiment 1: Binary and Decimal Numbers
Experiment 2: Digital Logic Gates
Experiment 3: Simplification of Boolean Functions
Experiment 4: Combinational Circuits
Experiment 5: Code Converters
Experiment 6: Design with Multiplexers
Experiment 7: Adders and Subtractors
Experiment 8: FlipFlops
Experiment 9: Sequential Circuits
Experiment 10: Counters
Experiment 11: Shift Registers
Experiment 12: Serial Addition
Experiment 13: Memory Unit
Experiment 14: Lamp Handball
Experiment 15: ClockPulse Generator
Experiment 16: Parallel Adder and Accumulator
Experiment 17: Binary Multiplier
HDL Simulation Experiments and Rapid Prototyping with FPGAs

10. Standard Graphic Symbols
Rectangular Shape Symbols
Qualifying Symbols
Dependency Notation
Symbols for Combinational Elements
Symbols for FlipFlops
Symbols for Registers
Symbols for Counters
Symbol for RAM

Answers to Selected Problems

Your questions answered

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