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Structured Computer Organization, 6th edition

  • Andrew S. Tanenbaum
  • Todd Austin

Published by Pearson (July 25th 2012) - Copyright © 2013

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Structured Computer Organization (2-download)

ISBN-13: 9780132923545

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Table of contents

1.1 STRUCTURED COMPUTER ORGANIZATION 2
1.1.1 Languages, Levels, and Virtual Machines 2
1.1.2 Contemporary Multilevel Machines 5
1.1.3 Evolution of Multilevel Machines 8
1.2 MILESTONES IN COMPUTER ARCHITECTURE 13
1.2.1 The Zeroth Generation–Mechanical Computers (1642—1945) 13
1.2.2 The First Generation–Vacuum Tubes (1945—1955) 16
1.2.3 The Second Generation–Transistors (1955—1965) 19
1.2.4 The Third Generation–Integrated Circuits (1965—1980) 21
1.2.5 The Fourth Generation–Very Large Scale Integration (1980—?) 23
1.2.6 The Fifth Generation–Low-Power and Invisible Computers 26
1.3 THE COMPUTER ZOO 28
1.3.1 Technological and Economic Forces 28
1.3.2 The Computer Spectrum 30
1.3.3 Disposable Computers 31
1.3.4 Microcontrollers 33
1.3.5 Mobile and Game Computers 35
1.3.6 Personal Computers 36
1.3.7 Servers 36
1.3.8 Mainframes 38
1.4 EXAMPLE COMPUTER FAMILIES 39
1.4.1 Introduction to the x86 Architecture 39
1.4.2 Introduction to the ARM Architecture 45
1.4.3 Introduction to the AVR Architecture 47
1.5 METRIC UNITS 49
1.6 OUTLINE OF THIS BOOK 50
2.1 PROCESSORS 55
2.1.1 CPU Organization 56
2.1.2 Instruction Execution 58
2.1.3 RISC versus CISC 62
2.1.4 Design Principles for Modern Computers 63
2.1.5 Instruction-Level Parallelism 65
2.1.6 Processor-Level Parallelism 69
2.2 PRIMARYMEMORY 73
2.2.1 Bits 74
2.2.2 Memory Addresses 74
2.2.3 Byte Ordering 76
2.2.4 Error-Correcting Codes 78
2.2.5 Cache Memory 82
2.2.6 Memory Packaging and Types 85
2.3 SECONDARYMEMORY 86
2.3.1 Memory Hierarchies 86
2.3.2 Magnetic Disks 87
2.3.3 IDE Disks 91
2.3.4 SCSI Disks 92
2.3.5 RAID 94
2.3.6 Solid-State Disks 97
2.3.7 CD-ROMs 99
2.3.8 CD-Recordables 103
2.3.9 CD-Rewritables 105
2.3.10 DVD 106
2.3.11 Blu-ray 108
2.4 INPUT/OUTPUT 108
2.4.1 Buses 108
2.4.2 Terminals 113
2.4.3 Mice 118
2.4.4 Game Controllers 120
2.4.5 Printers 122
2.4.6 Telecommunications Equipment 127
2.4.7 Digital Cameras 135
2.4.8 Character Codes 137
2.5 SUMMARY 142
3.1 GATES AND BOOLEAN ALGEBRA 147
3.1.1 Gates 148
3.1.2 Boolean Algebra 150
3.1.3 Implementation of Boolean Functions 152
3.1.4 Circuit Equivalence 153
3.2 BASIC DIGITAL LOGIC CIRCUITS 158
3.2.1 Integrated Circuits 158
3.2.2 Combinational Circuits 159
3.2.3 Arithmetic Circuits 163
3.2.4 Clocks 168
3.3 MEMORY 169
3.3.1 Latches 169
3.3.2 Flip-Flops 172
3.3.3 Registers 174
3.3.4 Memory Organization 174
3.3.5 Memory Chips 178
3.3.6 RAMs and ROMs 180
3.4 CPU CHIPS AND BUSES 185
3.4.1 CPU Chips 185
3.4.2 Computer Buses 187
3.4.3 Bus Width 190
3.4.4 Bus Clocking 191
3.4.5 Bus Arbitration 196
3.4.6 Bus Operations 198
3.5 EXAMPLE CPU CHIPS 201
3.5.1 The Intel Core i7 201
3.5.2 The Texas Instruments OMAP4430 System-on-a-Chip 208
3.5.3 The Atmel ATmega168 Microcontroller 212
3.6 EXAMPLE BUSES 214
3.6.1 The PCI Bus 215
3.6.2 PCI Express 223
3.6.3 The Universal Serial Bus 228
3.7 INTERFACING 232
3.7.1 I/O Interfaces 232
3.7.2 Address Decoding 233
3.8 SUMMARY 235
4.1 AN EXAMPLE MICROARCHITECTURE 243
4.1.1 The Data Path 244
4.1.2 Microinstructions 251
4.1.3 Microinstruction Control: The Mic-1 253
4.2 AN EXAMPLE ISA: IJVM 258
4.2.1 Stacks 258
4.2.2 The IJVM Memory Model 260
4.2.3 The IJVM Instruction Set 262
4.2.4 Compiling Java to IJVM 266
4.3 AN EXAMPLE IMPLEMENTATION 267
4.3.1 Microinstructions and Notation 267
4.3.2 Implementation of IJVM Using the Mic-1 272
4.4 DESIGN OF THE MICROARCHITECTURE LEVEL 283
4.4.1 Speed versus Cost 283
4.4.2 Reducing the Execution Path Length 286
4.4.3 A Design with Prefetching: The Mic-2 293
4.4.4 A Pipelined Design: The Mic-3 293
4.4.5 A Seven-Stage Pipeline: The Mic-4 301
4.5 I

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