Introduction to Microelectronic Fabrication: Volume 5 (Modular Series on Solid State Devices), 2nd edition

Published by Pearson (October 17, 2001) © 2002

  • Richard C. Jaeger
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For courses in Theory and Fabrication of Integrated Circuits.

The author's goal in writing this text was to present a concise survey of the most up-to-date techniques in the field. It is devoted exclusively to processing, and is highlighted by careful explanations, clear, simple language, and numerous fully-solved example problems. This work assumes a minimal knowledge of integrated circuits and of terminal behavior of electronic components such as resistors, diodes, and MOS and bipolar transistors.

(NOTE: Each chapter concludes with Summary, References, and Problems.)

Preface.


1. An Overview of Microelectronic Fabrication.

A Historical Perspective. An Overview of Monolithic Fabrication Processes and Structures. Metal-Oxide-Semiconductor (MOS) Processes. Basic Bipolar Processing. Safety.



2. Lithography.

The Photolithographic Process. Etching Techniques. Photomask Fabrication. Exposure Systems. Exposure Sources. Optical and Electron Microscopy. Further Reading.



3. Thermal Oxidation of Silicon.

The Oxidation Process. Modeling Oxidation. Factors Influencing Oxidation Rate. Dopant Redistribution During Oxidation. Masking Properties of Silicon Dioxide. Technology of Oxidation. Oxide Quality. Selective Oxidation and Shallow Trench Formation. Oxide Thickness Characterization. Process Simulation.



4. Diffusion.

The Diffusion Process. Mathematical Model for Diffusion. The Diffusion Coefficient. Successive Diffusions. Solid-Solubility Limits. Junction Formation and Characterization. Sheet Resistance. Generation-Depth and Impurity Profile Measurement. Diffusion Simulation. Diffusion Systems. Gettering.



5. Ion Implantation.

Implantation Technology. Mathematical Model for Ion Implantation. Selective Implantation. Junction Depth and Sheet Resistance. Channeling, Lattice Damage, and Annealing. Shallow Implantation. Source Listing



6. Film Deposition.

Evaporation. Sputtering. Chemical Vapor Deposition. Epitaxy. Further Reading.



7. Interconnections and Contacts.

Interconnections in Integrated Circuits. Metal Interconnections and Contact Technology. Diffused Interconnections. Polysilicon Interconnections and Buried Contacts. Silicides and Multilayer-Contact Technology. The Liftoff Process. Multilevel Metallization. Copper Interconnects and Damascene Processes. Further Reading.



8. Packaging and Yield.

Testing. Wafer Thinning and Die Separation. Die Attachment. Wire Bonding. Packages. Flip-Chip and Tape-Automated-Bonding Processes. Yield. Further Reading.



9. MOS Process Integration.

Basic MOS Device Considerations. MOS Transistor Layout and Design Rules. Complementary MOS (CMOS) Technology. Silicon on Insulator.



10. Bipolar Process Integration.

The Junction-Isolated Structure. Current Gain. Transit Time. Basewidth. Breakdown Voltages. Other Elements in SBC Technology. Layout Considerations. Advanced Bipolar Structures. Other Bipolar Isolation Techniques. BICMOS.



11. Processes for Microelectromechanical Systems—MEMS.

Mechanical Properties of Silicon. Bulk Micromachining. Silicon Etchants. Surface Micromachining. High-Aspect-Ratio Micromachining: The LIGA Molding Process. Silicon Wafer Bonding. IC Process Compatibility.



Answers to Selected Problems.


Index.

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