VHDL For Designers, 1st edition

  • Stefan Sjoholm
  • Lennart Lindh

Unfortunately, this item is not available in your country.


The specific goal of VHDL for Designers is not only to teach VHDL but also to describe how to use VHDL when designing an electronic system with modern design tools. The synthesis tools Synopsys, Mentor Graphics and ViewLogic are used.

Table of contents

1. Introduction to VHDL Concurrent VHDL.
2. Sequential VHDL.
3. Libnrary.
4. Package and Subprograms.
5. Structural VHDL.
6. RAM and ROM.
7. Testbench.
8. State Machines.
9. RTL Synthesis.
10. Design Methodology.
11. Test Methodology
13. Common Design Errors in VHDL and How to Avoid them.
14. Design Examples and Design Tips.
15. Development Tools.
16. Behavioural Synthesis.
17. Laboratories.
18. Answers.

Published by Pearson (December 27th 1996) - Copyright © 1997